TSMC builds 0.42nm interface to improve next-gen MoS2 transistors
Limited reporting49Researchers from National Yang Ming Chiao Tung University and TSMC have developed a new interface design for atomically thin transistors. They created a 0.42-nanometre aluminium oxide layer between monolayer MoS2 and a hafnium oxide dielectric. The design helped the transistors maintain strong el...
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